Analysis and design of analog integrated circuits / Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, Robert G. Meyer.

By: Gray, Paul R, 1942- [author.]
Contributor(s): Hurst, Paul James [author.] | Lewis, Stephen H. (Professor of electrical engineering) [author.] | Meyer, Robert G, 1942- [author.] | John Wiley & Sons [publisher.]
Language: English Publisher: Hoboken, New Jersey : Wiley, [2024]Copyright date: ©2024Edition: Sixth editionDescription: xiii, 952 pages : illustrations, 26 cmContent type: text Media type: unmediated Carrier type: volumeISBN: 9781394220069Subject(s): Linear integrated circuits -- Computer-aided design | Metal oxide semiconductors -- Computer-aided design | Bipolar transistors -- Computer-aided designDDC classification: 621.3815 LOC classification: TK7874 | .G688 2024
Contents:
Models for Integrated-Circuit Active Devices -- Bipolar, MOS, and BiCMOS Integrated-Circuit Technology -- Single-Transistor and Multiple-Transistor Amplifiers -- Current Mirrors, Active Loads, and References -- Output Stages -- Operational Amplifiers with Single-Ended Outputs -- Frequency Response of Integrated Circuits -- Feedback -- Frequency Response and Stability of Feedback Amplifiers -- Nonlinear Analog Circuits -- Noise in Integrated Circuits -- Fully Differential Operational Amplifiers.
Summary: "A very welcome new edition of the classic text for students and engineers covering the design of CMOS and bipolar analog integrated circuits. In addition to the well-established concepts, this 6th edition introduces a new super-source follower (SSF) circuit and its large-signal behavior, frequency response, stability, and noise properties. New material also introduces replica biasing; describes and analyzes two op amps with replica biasing; weighted zero-value time constants as a method to estimate the location of dominant zeros; pole-zero doublets including their effect on settling time and three examples of circuits that create doublets; the effect of feedback on pole-zero doublets; and MOS transistor noise performance, including a thorough treatment on thermally induced gate noise"-- Provided by publisher.
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SUBJECT REFERENCE 		621.3815 G7942 2024 (Browse shelf) Available CITU-CL-54364
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Includes index.

Models for Integrated-Circuit Active Devices -- Bipolar, MOS, and BiCMOS Integrated-Circuit Technology -- Single-Transistor and Multiple-Transistor Amplifiers -- Current Mirrors, Active Loads, and References -- Output Stages -- Operational Amplifiers with Single-Ended Outputs -- Frequency Response of Integrated Circuits -- Feedback -- Frequency Response and Stability of Feedback Amplifiers -- Nonlinear Analog Circuits -- Noise in Integrated Circuits -- Fully Differential Operational Amplifiers.

"A very welcome new edition of the classic text for students and engineers covering the design of CMOS and bipolar analog integrated circuits. In addition to the well-established concepts, this 6th edition introduces a new super-source follower (SSF) circuit and its large-signal behavior, frequency response, stability, and noise properties. New material also introduces replica biasing; describes and analyzes two op amps with replica biasing; weighted zero-value time constants as a method to estimate the location of dominant zeros; pole-zero doublets including their effect on settling time and three examples of circuits that create doublets; the effect of feedback on pole-zero doublets; and MOS transistor noise performance, including a thorough treatment on thermally induced gate noise"-- Provided by publisher.

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