| 000 -LEADER |
|---|
| fixed length control field |
02847cam a22004458i 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20250805164752.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
250421b ||||| |||| 00| 0 eng d |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
|---|
| LC control number |
2023055279 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9781394220069 |
| Qualifying information |
(hardback) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| Cancelled/invalid ISBN |
9781394220076 |
| Qualifying information |
(adobe pdf) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| Cancelled/invalid ISBN |
9781394220083 |
| Qualifying information |
(epub) |
| 041 ## - LANGUAGE CODE |
|---|
| Language code of text/sound track or separate title |
eng |
| 042 ## - AUTHENTICATION CODE |
|---|
| Authentication code |
pcc |
| 050 00 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7874 |
| Item number |
.G688 2024 |
| 082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.3815 |
| Edition number |
23/eng/20240227 |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Preferred name for the person |
Gray, Paul R., |
| Dates associated with a name |
1942- |
| Relator term |
author. |
| 245 10 - TITLE STATEMENT |
|---|
| Title |
Analysis and design of analog integrated circuits / |
| Statement of responsibility, etc |
Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, Robert G. Meyer. |
| 250 ## - EDITION STATEMENT |
|---|
| Edition statement |
Sixth edition. |
| 263 ## - PROJECTED PUBLICATION DATE |
|---|
| Projected publication date |
2404 |
| 264 #1 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Place of publication, distribution, etc |
Hoboken, New Jersey : |
| Name of publisher, distributor, etc |
Wiley, |
| Date of publication, distribution, etc |
[2024] |
| 264 #4 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Date of publication, distribution, etc |
©2024 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xiii, 952 pages : |
| Other physical details |
illustrations, |
| Dimensions |
26 cm |
| 336 ## - CONTENT TYPE |
|---|
| Content type term |
text |
| Content type code |
txt |
| Source |
rdacontent |
| 337 ## - MEDIA TYPE |
|---|
| Media type term |
unmediated |
| Media type code |
n |
| Source |
rdamedia |
| 338 ## - CARRIER TYPE |
|---|
| Carrier type term |
volume |
| Carrier type code |
nc |
| Source |
rdacarrier |
| 500 ## - GENERAL NOTE |
|---|
| General note |
Includes index. |
| 505 0# - CONTENTS |
|---|
| Formatted contents note |
Models for Integrated-Circuit Active Devices -- Bipolar, MOS, and BiCMOS Integrated-Circuit Technology -- Single-Transistor and Multiple-Transistor Amplifiers -- Current Mirrors, Active Loads, and References -- Output Stages -- Operational Amplifiers with Single-Ended Outputs -- Frequency Response of Integrated Circuits -- Feedback -- Frequency Response and Stability of Feedback Amplifiers -- Nonlinear Analog Circuits -- Noise in Integrated Circuits -- Fully Differential Operational Amplifiers. |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc |
"A very welcome new edition of the classic text for students and engineers covering the design of CMOS and bipolar analog integrated circuits. In addition to the well-established concepts, this 6th edition introduces a new super-source follower (SSF) circuit and its large-signal behavior, frequency response, stability, and noise properties. New material also introduces replica biasing; describes and analyzes two op amps with replica biasing; weighted zero-value time constants as a method to estimate the location of dominant zeros; pole-zero doublets including their effect on settling time and three examples of circuits that create doublets; the effect of feedback on pole-zero doublets; and MOS transistor noise performance, including a thorough treatment on thermally induced gate noise"-- |
| Assigning source |
Provided by publisher. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Linear integrated circuits |
| General subdivision |
Computer-aided design. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Metal oxide semiconductors |
| General subdivision |
Computer-aided design. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Bipolar transistors |
| General subdivision |
Computer-aided design. |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Hurst, Paul James, |
| Relator term |
author. |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Lewis, Stephen H. |
| Titles and other words associated with a name |
(Professor of electrical engineering), |
| Relator term |
author. |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Meyer, Robert G., |
| Dates associated with a name |
1942- |
| Relator term |
author. |
| 710 2# - ADDED ENTRY--CORPORATE NAME |
|---|
| Corporate name or jurisdiction name as entry element |
John Wiley & Sons, |
| Relator term |
publisher. |
| 906 ## - LOCAL DATA ELEMENT F, LDF (RLIN) |
|---|
| a |
7 |
| b |
cbc |
| c |
orignew |
| d |
1 |
| e |
ecip |
| f |
20 |
| g |
y-gencatlg |
| 942 ## - ADDED ENTRY ELEMENTS |
|---|
| Source of classification or shelving scheme |
|
| Item type |
BOOK |