| 000 | 00819nam a22002537a 4500 | ||
|---|---|---|---|
| 999 |
_c71556 _d71556 |
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| 003 | CITU | ||
| 005 | 20210730031742.0 | ||
| 008 | 210730b ||||| |||| 00| 0 eng d | ||
| 020 | _a9812405860 | ||
| 040 |
_aCITU LRAC _beng |
||
| 082 | _a621.3819582 | ||
| 100 | 1 |
_aDuek, Robert K. _eauthor |
|
| 245 | 1 | 0 |
_aDigital design with CPLD applications and VHDL / _cRobert K. Duek. |
| 264 | 1 |
_aAustralia: _bThomson Learning, _cc2001. |
|
| 300 |
_axv, 846 pages: _billustrations; _c28 cm. |
||
| 336 |
_atext _btxt _2rdacontent |
||
| 337 |
_aunmediated _bn _2rdamedia |
||
| 338 |
_avolume _bnc _2rdacarrier |
||
| 650 | 0 |
_aProgrammable logic devices _xDesign and construction. |
|
| 650 | 0 | _aProgrammable array logic. | |
| 650 | 0 | _aLogic design. | |
| 650 | 0 | _aVHDL (Computer hardware description language) | |
| 942 |
_2ddc _cBK |
||