Computer architecture : A quantitative approach / John L. Hennessy and David A. Patterson.
By: Hennessy, John L [Author]
Contributor(s): Patterson, David A | Patterson, David A. Computer architecture
Language: English Publisher: Amsterdam Morgan Kaufmann Publishers, c2003Edition: Third EditionDescription: 1 volume (various pagings) : illustrations ; 25 cmContent type: text Media type: unmediated Carrier type: volume ISBN: 1558605967 (cloth : alk. paper); 9781558605961Subject(s): Computer architectureDDC classification: 004.22 LOC classification: QA76.9.A73 | P377 2003Online resources: Publisher description | Table of contents| Item type | Current location | Home library | Call number | Copy number | Status | Date due | Barcode | Item holds |
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COLLEGE LIBRARY | COLLEGE LIBRARY SUBJECT REFERENCE | 004.22 H392 2003 (Browse shelf) | c. 1 | Available | CITU-CL-29030 | ||
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COLLEGE LIBRARY | COLLEGE LIBRARY SUBJECT REFERENCE | 004.22 H392 2003 (Browse shelf) | c. 2 | Available | CITU-CL-29055 |
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| 004.22 H17 2002 Computer organization / | 004.22 H17 2002 Computer organization / | 004.22 H392 1998 Computer organization and design : the hardware/software interface / | 004.22 H392 2003 Computer architecture : A quantitative approach / | 004.22 H392 2003 Computer architecture : A quantitative approach / | 004.22 H392 2012 Computer architecture : A quantitative approach / | 004.22 H3927 2019 Computer architecture : a quantitative approach / |
On t.p. of previous ed. David A Patterson's name appeared first.
Includes bibliographical references and index.
Fundamentals of computer design --
Instruction set principles and examples --
Instruction-level parallelism and its dynamic exploitation --
Exploiting instruction-level parallelism with software approaches --
Memory hierarchy design --
Multiprocessors and thread-level parallelism --
Storage systems --
Interconnection networks and clusters --
Appendices.
Provides the method of quantitative analysis not only to high performance desktop machine design, but also to the design of embedded and server systems. This work adopts the MIPS 64 as the instruction set architecture. It also covers the instruction sets to include descriptions of digital signal processors, media processors, and others.
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